发明名称 HIGH-SPEED PULL-IN PLL TYPE FREQUENCY SYNTHESIZER
摘要 PURPOSE:To reduce the power consumption and enable high-speed switching by utilizing the synthesizer for the local oscillator of a transmitter receiver for mobile radio communication. CONSTITUTION:The PLL type frequency synthesizer which divides the output f0 (frequency: 10MHz) of a reference oscillator 3 to a low frequency fR to generate a reference signal for the 2nd loop of a PLL and compares the phase of a reference signal of constant frequency fm (25KHz) of the variable frequency divider 7 with a variable frequency division ratio 1/M (M: 40,000) to obtain a specific output frequency fout (1GHz) is equipped with a direct digital synthesizer DDS1 generating a high frequency reference signal fsv which is much higher than a frequency interval (25KHz), but lower than an oscillation frequency (10MHz) and variable (almost at 1MHz 40 times as high as 25KHz) and a phase comparing means 2 for a 1st loop of a signal; and the 1st loop switches a new output frequency f2 back to the output B of the 2nd phase comparing mean 4 at a point (t) of time when the new output frequency f2 is determined and the power supply to the DDS1 is cut off at the switching-back point of time.
申请公布号 JPH06276096(A) 申请公布日期 1994.09.30
申请号 JP19930059170 申请日期 1993.03.19
申请人 FUJITSU LTD 发明人 KUBO NORIO;WATANABE YASUNOBU
分类号 H03L7/22;H03L7/087;H03L7/18;H04B1/40 主分类号 H03L7/22
代理机构 代理人
主权项
地址