发明名称 EXTERNAL SYNCHRONIZATION DEVICE
摘要 PURPOSE:To provide the external synchronization device configured inexpensively with less number of PLL circuits in which no out of synchronism takes place even when a phase of a horizontal synchronizing signal separated from a video signal is subject to fluctuation. CONSTITUTION:When a phase of a frequency signal DH2 outputted from a frequency divider 26 is dissident with a phase of a horizontal synchronizing signal DH1 separated from a video signal SV, a switch 54 is closed to allow switches 51, 55 to be thrown to the position (a). An oscillated frequency from an oscillator 52 is lower than a frequency 4fsc and the phase of the signal DH2 with respect to the phase of the synchronizing signal DH1 is being changed. After the phase of the signal DH2 is coincident with the phase of the synchronizing signal DH1, the switch 54 is opened to allow the switches 51, 55 to be thrown to the position (b). Since an oscillating signal from an oscillator 6 of a PLL circuit is frequency-divided to obtain the signal DH2, the state of the coincidence between the phase of the signal DH2 and the phase of the synchronizing signal DH1 is maintained even without use of an exclusive PLL circuit, and since the phase of the signal DH2 is not compared with the phase of the synchronizing signal DH1 after the coincidence between the phases, even when the phase of the synchronizing signal DH1 is fluctuated due to any cause, it does not give effect on the phase of the signal DH2.
申请公布号 JPH06276407(A) 申请公布日期 1994.09.30
申请号 JP19930064107 申请日期 1993.03.23
申请人 AIWA CO LTD 发明人 HASHIMOTO HIROYUKI
分类号 H04N5/06;G10K15/04;H04N5/04;H04N5/073;H04N5/278;H04N5/445 主分类号 H04N5/06
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