CIRCUIT TO REDUCE DROPOUT VOLTAGE IN LOW DROPOUT VOLTAGE REGULATOR

摘要

An integrated circuit voltage regulator employs a PNP pass transistor (13) to produce a low dropout voltage. Saturation in the pass transistor (13) produces excessive substrate current which appears in the form of wasted current which lowers the regulator efficiency. A sat catcher circuit is employed to avoid pass transistor (13) saturation. The sat catcher has its operation controlled dynamically so the dropout voltage is minimized and maintains good performance at high regulator output currents.