发明名称 Arbitration process for controlling data flow through an I/O controller.
摘要 <p>An arbiter of an I/O controller implements an arbitration process for controlling bi-directional data flow between a local area network and a main memory connected to a system bus having variable latency. A receive state machine of the controller manages inbound data bursts from the network by temporarily storing the data in a receive buffer before transfer to the main memory. Outbound data bursts from the main memory are managed by a transmit state machine of the controller, and are temporarily stored in a transmit buffer prior to transmission onto the network. The arbitration process assigns each of the receive and transmit state machines priority for accessing the system bus depending upon certain status conditions of the controller. These conditions include: (i) whether one or both of the state machines are contending for access to the system bus; (ii) whether the controller is configured for full-duplex or half-duplex communication over the network; (iii) the current status of the transmit and receive network ports; and (iv) the current state of the receive and transmit buffers. &lt;IMAGE&gt; &lt;IMAGE&gt; &lt;IMAGE&gt;</p>
申请公布号 EP0617368(A1) 申请公布日期 1994.09.28
申请号 EP19940301949 申请日期 1994.03.18
申请人 DIGITAL EQUIPMENT CORPORATION 发明人 YANG, HENRY S.;KAMAKRISHNAN, KADANGODE K.;DANIELY, GADY;WERTHEIMER, AVIAD
分类号 G06F13/30;G06F13/362;(IPC1-7):G06F13/28 主分类号 G06F13/30
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