| 摘要 |
A base value deciding circuit for deciding the base value doubly prevents an error operation generated from a viterbi decoder of the viterbi error correction apparatus. The circuit includes a viterbi decoder for decoding a data signal, a synchronizing error detector for detecting the number of error detections, first and second coefficient parts for outputting a recognizing signal when a pulse signal exceeds a determined base value, first and second base value deciders, a third coefficient part, a third base value decider, a bipolar switch for selecting and outputting the recognized signals, and a clock synchronizer.
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