| 摘要 |
PURPOSE: To provide a method and a device for synchronizing the flow of the pixel data of a memory display interface MDI and supporting plural display devices. CONSTITUTION: A clock circuit 27 receives pixel clocks 81, generate shift clocks VSCLKs 20, pipeline clocks 28 and input control signals 53, they are synchronized with pixel clocks and it synchronizes color pixel data from the MDI 14 to a DAC 16. The pipeline clocks synchronize a pixel data processing through a pixel processing pipeline. Corresponding to a pixel depth mode, the frequency of the pixel clocks and the number of pixels, the pixel data are sent out from a VRAM frame buffer 12 to the pixel processing pipeline. The VSCLKs control the transfer of the pixel data from the VRAM frame buffer corresponding to the pixel depth mode and the frequency of the pixel clocks. |
