| 摘要 |
<p>PURPOSE:To reduce the power consumption caused by an MPU by controlling a frequency of a clock supplied to the MPU, in a data processor such as a computer, etc. CONSTITUTION:A frequency of an MPU clock signal 22 supplied to an MPU2 by a clock control circuit 14 is lowered in the course of holding cycle of the MPU2. Or, the MPU clock signal 22 supplied to the MPU2 is stopped by a clock stop control circuit. When the MPU2 accesses an input/output part and a memory whose access time is slow, a wait cycle is not executed by the MPU2, but a signal for stopping the MPU clock signal 22 in a wait period, is generated by a bus wait control circuit, and by using this signal, the MPU clock signal 22 supplied to the MPU2 is stopped temporarily by the clock stop control circuit. In such a manner, electric power consumed by the MPU is reduced.</p> |
