Selective call receiver having CMOS power-on reset circuit

摘要

A selective call receiver (100) operates to recover an information signal and is capable of receiving a battery supplying a first voltage (203) that is multiplied to generate a second voltage (212). The selective call receiver (100) includes [comprises] a processor (106) that extracts message information contained within the recovered information signal for presentation and a power-on reset circuit (112) that generates a power-on reset signal having [comprising] first and second portions corresponding with a processor reset and a processor execute state, respectively. The power-on reset signal changes from the processor reset to the processor execute state when the second voltage (212) exceeds a sum of a PMOS threshold voltage and a NMOS threshold voltage, thereby completing a power-on reset of the processor (106).