发明名称 |
Multi-port RAM having means for providing selectable interrupt signals |
摘要 |
A multi-port RAM has a decoding portion for decoding a plurality of specific addresses for generating interruptions and a selection circuit for selecting some addresses from among the plurality of specific addresses. Since the plurality of addresses are selected for generating interruptions in parallel or in the sequence of time for each generation of an interruption, the data processing capability at the time of generation of interruptions can be improved.
|
申请公布号 |
US5349564(A) |
申请公布日期 |
1994.09.20 |
申请号 |
US19910731556 |
申请日期 |
1991.07.17 |
申请人 |
MITSUBISHI DENKI KABUSHIKI KAISHA |
发明人 |
MIYAKE, TAKASHI;SUGITA, MITSURU |
分类号 |
G11C11/401;G06F12/00;G06F13/24;(IPC1-7):G11B7/00 |
主分类号 |
G11C11/401 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|