| 摘要 |
PURPOSE: To provide a logical circuit wherein it is intended to make the maximization of the propagating speed of the logical circuit substantially possible and simplify the designing process thereof. CONSTITUTION: Characterizing the gate width of a MOS poll-up means 106 by a first dimension, a bipolar pull-up means 102 forms a low-resistance current path when the input signal of a logical circuit 100 becomes a second logical level to bring an output terminal 112 of the logical circuit 100 into a first logical level. Then, characterizing the gate width of a MOS pull-down means 104 by a second dimension, the MOS pull-down means 104 forms a low-resistance current path when the input signal of the logical circuit 100 becomes the first logical level to bring the output terminal 112 into the second logical level. In this case, the first and the second dimensions are related to each other by an optimum ratio to make the propagating delay of the logical circuit 100 substantially minimum. |
