| 摘要 |
PURPOSE:To provide a device which securely evade the operation stop of a system due to a software error as to a device which performs cache memory disconnection control. CONSTITUTION:This cache disconnection controller is provided with error counters 12 prepared by ways or way groups of a cache memory 10, a means 14 which detects the occurrence of a cache error from read data of the cache memory 10, a means 16 which updates the value of the error counter 12 prepared for the way or way group where the cache error occurs, disconnection request output latches 18 which are provided by the error counters 12 and output requests to disconnect the ways or way group prepared for the error counter 12 when the values of the corresponding error counters 12 reach a predetermined value, and a means 20 which rest all the error counters 12 at the same time each time a certain time is elapsed. |
