发明名称 Integrierte Schaltungshalbleiteranordnung mit verbesserter Einrichtung für Speiseleitungen.
摘要 A semiconductor integrated circuit device includes a plurality of functional blocks (17 - 20) each executing respective logic operations and arranged in an internal area on a semiconductor chip (100), and a first power source line (29) arranged so as to surround the internal area. The first power source line is a closed-loop line. Second power source lines (23 - 26; 45; 46) are provided for the respective functional blocks so as to surround the respective functional blocks on the chip. Each of the second power source lines is a closed-loop line. Third power source lines (27) mutually connect the second power source lines for the functional blocks and connect the second power source lines and the first power source line.
申请公布号 DE68917398(D1) 申请公布日期 1994.09.15
申请号 DE1989617398 申请日期 1989.09.15
申请人 FUJITSU LTD., KAWASAKI, KANAGAWA, JP 发明人 YAMAMURA, TAKESHI, ZAMA-SHI KANAGAWA, 228, JP;ENDO, SEIJI, KAWASAKI-SHI KANAGAWA, 211, JP;KAWAUCHI, KAZUYUKI, YOKOHAMA-SHI KANAGAWA, 223, JP;KORENAGA, HIROKI, ICHIKAWA-SHI CHIBA, 272, JP
分类号 H01L21/822;H01L21/82;H01L23/528;H01L27/04;H01L27/118;(IPC1-7):H01L23/538 主分类号 H01L21/822
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