Passivation layers composed of amorphous semiconductor material such as silicon vapour-deposited in vacuo have proved satisfactory for reverse voltages of up to 4 kV. Said passivation layers are also satisfactory at reverse voltages of over 4 kV if the ratio of the reverse current density of the heterojunction to the conductivity of the amorphous layer is greater than the maximum field gradient at the surface of the device multiplied by the thickness of the amorphous layer and the barrier heights of the heterojunction reduced by the surface potential of the amorphous layer are in all cases less than half the band gap in the semiconductor body. <IMAGE>
申请公布号
DE58908152(D1)
申请公布日期
1994.09.08
申请号
DE1989508152
申请日期
1989.05.31
申请人
SIEMENS AG, 80333 MUENCHEN, DE
发明人
SCHMIDT, GERHARD, DR. DIPL.-PHYS., D-8550 FORCHHEIM, DE