Input circuit for a pulse counter

摘要

In this circuit, two capacitors (C1, C2), which are connected in parallel with respect to a voltage source (U0) via a resistor (R4), are provided, the two capacitors (C1, C2) being dischargeable via a switch (S), particularly a sensor. The first capacitor (C1) is followed by a first logic element (L1), the second capacitor (C2) followed by a second logic element (L2), the output (A1) of the first logic element (L1) being supplied to an input (E2) of the second logic element (L2). During each closing process of the switch (S), the pulse counter is supplied with a voltage pulse of defined width via an output (A2) of the second logic element (L2). <IMAGE>