| 摘要 |
<p>An output driver is implemented by a complementary inverter circuit (23) responsive to an output data signal (S1) for selectively charging and discharging an external capacitive load (LC), and the complementary inverter circuit has a p-channel enhancement type field effect transistor (26) formed in an n-type well (33) defined in a p-type silicon substrate (21) reversely biased and an n-channel enhancement type field effect transistor (27) formed in a p-type well (34) nested with a reversely biased n-type well (32) defined in the p-type silicon substrate in spacing relation to the n-type well assigned to the p-channel enhancement type field effect transistor, thereby perfectly isolating the p-channel enhancement type field effect transistor from a noise propagated from a ground voltage line (Lgnd1) to the p-type well assigned to the n-channel enhancement type field effect transistor. <IMAGE></p> |
