Semiconductor memory device

摘要

A sense amplifier (SA1) with a pair of NMOS transistors (4, 5), which are connected in series between a pair of bit lines (BL, /BL), differentially amplifies the potential difference between the pair of bit lines (BL, /BL) by reducing the source potentials of the NMOS transistors (4, 5) to earth potential (GND). A NMOS transistor (17) is activated for a predetermined time after the initiation of a differential amplification by the sense amplifier (SA1), as a result of which the source potentials of the NMOS transistors (4, 5) are controlled during this predetermined time to achieve a potential (V1) which is lower than the earth potential (GND). As a result, the operating latitude of the NMOS transistors (4, 5) is increased during the predetermined period of time. <IMAGE>