发明名称 Retriggered oscillator for jitter-free phase locked loop frequency synthesis
摘要 An embodiment of the present invention is a retriggered oscillator timebase including a phase lock loop controlled ring for direct retriggering by a reference oscillator. The ring has taps at various successive stages that are output to an on-the-fly selector that can add any ten-bit value to a current-tap selection to enable a next-tap selection. Such on-the-fly addition can increase the period of a signal each cycle and thereby divide the reference frequency. Ring outputs are also used to drive two other retriggered rings for a plurality of NANO timing generators. The use of two rings allows retriggering of one of the rings before the other has completed a whole one-shot cycle. An on-the-fly selector subtracts a value from a present "NANO" select to a next "NANO" select to convert back the timebase to the fixed reference frequency for phase and frequency comparison. The subtraction acts as a frequency multiplication whose output "t0fx " is equal to the reference frequency.
申请公布号 US5345186(A) 申请公布日期 1994.09.06
申请号 US19930005651 申请日期 1993.01.19
申请人 CREDENCE SYSTEMS CORPORATION 发明人 LESMEISTER, GARY J.
分类号 H03K3/354;G01R31/317;G01R31/319;H03K3/03;H03K5/135;H03K5/15;H03L7/081;H03L7/087;H03L7/099;(IPC1-7):H03K5/26 主分类号 H03K3/354
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