Instruction fetch circuit which allows for independent decoding and execution of instructions

摘要

A instruction fetch circuit which allows portions of the instruction to be decoded and executed independently. The invention includes a first register for storing a digital data word having first and second bytes. The first register provides first and second outputs of the first and second digital bytes respectively. A first multiplexer circuit is included for selecting and storing either of the first or second outputs of the first register and providing a first intermediate output corresponding thereto. A second multiplexer circuit is included for selecting and storing either of the first or second outputs of the first register or the first intermediate output of the first multiplexer circuit and providing a second intermediate output corresponding thereto. Control circuitry is included for selectively activating the first register and the first and second multiplexer circuits to present portions of the instruction for decoding. Additional multiplexer circuits are included to handle larger instructions.