发明名称 |
Method for generating power slits |
摘要 |
An automatic method of generating slits in power buses on a chip. The present invention includes three embodiments. The first embodiment is directed to a generic method of generating power slits. Once bus dimensions are identified, predetermined parameters for optimal power slit size and number are used to automatically generate a power slit layer for the mask database. The second embodiment is a continuation of the first embodiment and is directed to a method of generating power slits for an orthogonal corner case; where two buses overlap at 90 DEG angles. This is performed by locating all corner cases. Power slits are removed within a cross (corner/intersect) area of overlapping buses. At this point power slits from overlapping buses are extended across the corner/intersect area. The extension lines are logically ANDed together resulting in points within the corner/intersect area where the extension lines intersect. These intersection points indicate where new types of power slits, called "holes", can be generated. The third embodiment is directed to a method of generating power slits for non-orthogonal corner case. It is generally identical to the second embodiment. |
申请公布号 |
US5345394(A) |
申请公布日期 |
1994.09.06 |
申请号 |
US19920833419 |
申请日期 |
1992.02.10 |
申请人 |
S-MOS SYSTEMS, INC. |
发明人 |
LIN, CHONG M.;CHUANG, TATAO;LONG, TRAN;HOANG, HY |
分类号 |
G06F17/50;H01L23/528;(IPC1-7):G06F15/60 |
主分类号 |
G06F17/50 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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