发明名称 Single transistor EEPROM architecture
摘要 A single-transistor EEPROM device of the present invention comprises memory transistors in banks similar to NAND structures wherein the control gates of the memory transistors have negative voltages applied in various modes that allow reading, writing, and programming regardless of the Vth of nonselected memory transistors in a bank. Programming and erasing results from various combinations of negative and positive voltages are used on the select gates together with positive voltages less than that alone which is necessary to induce Fowler-Nordheim tunneling are applied to the bit lines.
申请公布号 US5345418(A) 申请公布日期 1994.09.06
申请号 US19930151597 申请日期 1993.11.12
申请人 NEXCOM TECHNOLOGY, INC. 发明人 CHALLA, NAGESH
分类号 G11C16/04;G11C16/10;G11C16/26;(IPC1-7):G11C11/40 主分类号 G11C16/04
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