发明名称 STRUCTURE OF MULTI-CHIP PACKAGE
摘要 PURPOSE:To provide a multi-chip package in which unfilled portions or voids do not easily occur, by an arrangement of the semiconductor chip or electronic component in the package. CONSTITUTION:On a substrate 1 on which a wiring pattern 2 was preformed, a semiconductor 3 or a sealed semiconductor device 8 and a plurality of other electronic components 4 are arranged, an electrical contact with the wiring pattern 2 on the substrate 1 is made, and after an electrode 7 on the substrate 1 is electrically contacted with leads 11 by means of wires 5 of gold wires or the like, the structure is seald by resin and cut off from a lead frame 10, and the leads 11 is formed, forming the structure. In particular, a structure of the multi-chip package in which the arrangement is made so that the angle formed by the longitudinal direction of at least the one having the maximum volume among the electronic components such as the semiconductor chip for the substrate with a radial line along the injection direction of the sealing agent falls within the range of + or -45 degrees.
申请公布号 JPH06244309(A) 申请公布日期 1994.09.02
申请号 JP19930025570 申请日期 1993.02.15
申请人 SEIKO EPSON CORP 发明人 KOMIYAMA TADASHI
分类号 H01L21/56;H01L23/28;H01L23/50;H01L25/04;H01L25/18;(IPC1-7):H01L23/28 主分类号 H01L21/56
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