发明名称 SEMICONDUCTOR SELF TEST DEVICE
摘要 PURPOSE:To effectively execute a self-check for a large scale LSI by dividing a function block into a control section and a data operation section, and controlling the control section on a test instruction issued from an instruction housing ROM. CONSTITUTION:When an address counter 6 is actuated by a self-test starting signal 16, three kinds of signals for a test instruction, data and an expected value are output through one address. Test data are input from a data housing ROM 4 into the operation section 2 of a function block 1 by a switch 13, and the test instruction is input from an instruction housing ROM into a control section 3. The output 15 of the test data arithmetically processed in the operation section 2 is compared with the output of an expected value housing ROM 7 by a comparative detector 8 and held in a detection result holding register 9 as the bivalent signal of test result. Whether LSI is normal or abnormal is judged by sending the logical sum of a plurality of registers 9 provided inside LSI outside LSI through a serial transfer line 10.
申请公布号 JPH06242187(A) 申请公布日期 1994.09.02
申请号 JP19930024363 申请日期 1993.02.12
申请人 NEC CORP 发明人 YAMADA KOICHI
分类号 G01R31/28;G06F11/22;G11C29/00;G11C29/12;H01L21/822;H01L27/04 主分类号 G01R31/28
代理机构 代理人
主权项
地址