| 摘要 |
PURPOSE: To economically test an IC device, particularly, a memory device by mutually comparing the output data signals from a device to be tested (DUT) within a parallel comparing circuit. CONSTITUTION: After an address signal is transmitted from a device test device 30 to a DUT 31, a test data signal is transmitted to a parallel comparing circuit 91 and the DUT 31. Then, the circuit 91 reads and mutually compares 84 the output data of the DUT 31, and outputs, onto a line 45, a first state signal when all the outputs are in the same voltage level corresponding to the same logic level, and a second state signal when they are voltages corresponding to different logic levels. A transceiver circuit 41 compares the signal on the line 45 with a test data signal pattern stored in 91, and generates a pass signal when the both are matched, and a fail signal when the both are different. The remaining three transceiver circuits 46-48 simultaneously test additive multiple data input and output devices 51, 61, 71 through parallel comparing circuits 96-98. |
