| 摘要 |
<p>A mechanism (50) is provided that allows partial reading of storage locations (15), such as statistics counters (65), by providing a temporary read data storage latch (63) on a peripheral device (12). The latches (50) are updated with fresh data from an address storage location (15) whenever any one of the following conditions is met: 1) the address accessed by the host (10) differs from the previous access; 2) the host (10) has written to the device (50) prior to the current read; or 3) when accessing the same location sequentially, one or more bytes of the second read have already been read by the host (10) in a previous read. These rules allowed for byte- or word-wise write/read/verify cycles; bytes- or word-wise reads of dynamic data; and byte, word, or double-word with polling of registers. With this mechanism (50), it is impossible for the host (10) to erroneously end up with 01ff (hex) as it reads a four byte register a byte at a time when the register increments from 00ff to 0100 between the sequential reads.</p> |
