| 摘要 |
The circuit easily detects an abnormal states transmission line by a test program, and improves a fiedility of exchanger system. The circuit includes an overvoltage protector (211) which suppresses an overvoltage, an echo rejection circuit (IEC-T:212), an U-interface means (21), an ISDN exchange power controller (IEPC:22), an extension PCM matching control means (23:EPIC), an TSL matching means (28), a clock compensation means (32), an ISDN D channel exchange control means (24:IDEC), a memory map decoding means (25), a common memory (30), an LC bus matching means (31), a control bus (33), and a CPU (27).
|
