发明名称 Image processing apparatus and method of controlling the same.
摘要 <p>Texture mapping is performed on polygons at the same speed as a polygon drafting process without a texture cache, thereby preventing complexity and an increase in cost. An image memory (8) is constituted in a double-buffer structure, and an address line, a data line and a memory control line are individually connected to each buffer. One of the two buffers is used for texture data, and the other for a drawing result. The texture data is one-dimensional, and the size thereof is less than a maximum value of a column address. The other buffer is an imaginary double buffer with two buffers, one of the buffers being used for reading out image data from a SAM port, the other being used for writing image data produced from polygons. Read/write switching is effected in a vertical flyback period. In the read-out buffer, just after row-directional read-out, the associated row is cleared by the flash write function of a multiport DRAM in a horizontal flyback period, and the next read-out address is output. In synchronism with this, texture data is refreshed. &lt;IMAGE&gt;</p>
申请公布号 EP0613098(A2) 申请公布日期 1994.08.31
申请号 EP19940102256 申请日期 1994.02.14
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 CHIMOTO, HIROYUKI, C/O INTEL. PROPERTY DIVISION
分类号 G06T15/00;(IPC1-7):G06F15/72 主分类号 G06T15/00
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