| 摘要 |
A stacked trench capacitor including a first trench formed in a semiconductor substrate, an insulating material, preferably BPSG, substantially filling the first trench to thereby define an isolation region of the substrate, a second trench formed in the first trench, the second trench being much narrower and shallower than the first trench, a storage electrode formed on the sidewalls and bottom surface of the second trench, a thin dielectric film formed on the storage electrode, and a plate electrode formed on the thin dielectric film. In a preferred embodiment, the isolation region serves to separate and electrically isolate adjacent memory cells of a semiconductor memory device, each of the memory cells including a MOSFET transistor and a stacked trench capacitor constructed as described above. An impurity region is formed in the substrate adjacent an outer sidewall of the second trench to a depth preferably substantially equal to that of the second trench, the conductivity type of the impurity region being opposite that of the substrate. An upper portion of the impurity region preferably serves as the source region of the MOSFET transistor of the memory cell.
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