发明名称 |
CIRCUIT FOR CALCULATING CRC OF ATM CELL HEAD |
摘要 |
The cyclic redundancy code (CRC) calculating circuit includes first and second 8-bit flip flops for retiming input and output data, an exclusive OR circuit for generating a next 8-bit register value for CRC calculation, an 8-bit register for latching data for CRC generation, a select circuit for inserting a CRC into a transfer data stream, and a delay circuit for supplying a control signal to the select circuit, thereby providing useful CRC calculation for high-speed data.
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申请公布号 |
KR940007872(B1) |
申请公布日期 |
1994.08.26 |
申请号 |
KR19910024028 |
申请日期 |
1991.12.23 |
申请人 |
KOREA ELECTRONICS & TELECOMMUNICATIONS RESEARCH INSTITUTE |
发明人 |
KANG, KU - HONG;LEE, BOM - CHOL;KIM, JONG - SHIK;PARK, KWON - CHOL |
分类号 |
G06F9/00;(IPC1-7):G06F9/00 |
主分类号 |
G06F9/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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