发明名称 |
Video signals clamping circuit for maintaining DC level of video signals |
摘要 |
A video signal clamping circuit capable of maintaining a DC level of a digital video signal at a fixed level, in which a pedestal level in a vertical blanking period of the digital video signal after an A/D conversion is sampled, and an average value of a plurality of sampling data in a plurality of fields is calculated by an average value calculator. The average value is compared with a predetermined clamp level reference value by a comparison output circuit, and depending on the comparison result, a signal either added or subtracted by a certain width to or from an output signal of a predetermined period before is output for automatically controlling a clamp voltage.
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申请公布号 |
US5341218(A) |
申请公布日期 |
1994.08.23 |
申请号 |
US19920864679 |
申请日期 |
1992.04.07 |
申请人 |
MITSUBISHI DENKI KABUSHIKI KAISHA |
发明人 |
KANEKO, HIDEKI;INOUE, SADAYUKI;OOKUMA, IKUO |
分类号 |
H04N5/14;H04N5/18;(IPC1-7):H04N5/18;H04N5/16;H04N9/72 |
主分类号 |
H04N5/14 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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