| 摘要 |
PURPOSE: To provide a zero-phase restarting circuit by which the phase difference between two signals is surely made zero at restarting time and which is free from residual errors. CONSTITUTION: A zero-phase restarting circuit is constituted of an enabling means 11 which supplies first output signals upon receiving input signals 10, a clock-generating means 12 which is connected to the enabling means 11 and supplies second output signals with a first time lag from the point of time the input signals 10 are supplied to the enabling means 11 upon receiving the first output signals, a delaying means 14 which is connected to the input signals 10, gives a second time lag to the input signals 10, and supplies third output signals, and a phase detecting means 13 which is connected to the means 12 and 14 and compares the frequency of the second output signals with that of the third output signals. |
