发明名称 MULTIPLEXING ARRANGEMENT
摘要 A multiplexing arrangement for multiplexing data packets from different sources into a continuous flow, i.e. without gaps, of serially transmitted data packets. Each packet is constituted by several (13) sets of n(=4) digital words or bytes and by at least one set of r(=1) digital words, with r smaller than n. The arrangement includes several input memory units (RAM0-RAM3) each adapted to receive and to store at least one packet and comprising several memory portions each able to store up to n digital words of a packet, two input registers (RGR/RGN) adapted to read from the memory portions either one set of r digital words, one set of n digital words, or both simultaneously, a multiplexing means (MUX) adapted to combined the read sets and to transfer at least a portion of the combined sets to an output terminal (OUT) of the arrangement. The multiplexing means includes buffer means (BUFF),mixing means (MIX1) and transfer means (MIX2) for transferring, under the control of control means (CNTL), portions of n digital words from the combined sets and for re-combining the remaining part of these combined sets with other sets received from the input registers in order to obtain the above continuous flow data packets.
申请公布号 CA2116053(A1) 申请公布日期 1994.08.23
申请号 CA19942116053 申请日期 1994.02.21
申请人 ALCATEL N.V. 发明人 SCHMIT, JEAN-JACQUES;VAN DE POL, DANIEL F. J.;VAN EECKHOUT, RUDY
分类号 H04Q3/00;H04J3/24;H04L12/56;H04Q11/04;(IPC1-7):H04L12/52 主分类号 H04Q3/00
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