| 摘要 |
<p>PURPOSE:To reduce the difference of a power source level which an output signal goes to a ground level caused by the power source rising time of a power source applying signal by connecting a resistor to a power source in parallel with electric field effect transistors being series-connected. CONSTITUTION:In a circuit generating the power source inputting signal PON by connecting P channel MOS transistors Q1 and Q2 in series, connecting them to ground via a resistor R1 and applying the voltage on a node N1 to an inverter I1, a resistor R2 is connected between the node N1 and the power source. In this constitution of the circuit, the level on the node N1 becomes the divided level by resistors R1 and R2 to be a constant value. Thus, the difference of the power source level which the output signal PON goes to the ground level can be reduced regardless the rising at the time of power source applying.</p> |
