发明名称 Method and apparatus for controlling a rounding operation in a floating point multiplier circuit
摘要 A floating point multiply of two n-bit operands creams a 2n-bit result, but ordinarily only n-bit precision is needed, so rounding is performed. Some rounding algorithms require the knowledge of the presence of any "1" in the n-2 low-order bits of the 2n-bit result. The presence of such a "1", indicates the so-called "sticky bit" is set. The sticky bit is calculated in a path separate from the multiply operation, so the n-2 least significant sums need not be calculated. This saves time and circuitry in an array multiplier, for example. In an example method, the difference between n and the number of trailing zeros, "x", in one of the n-bit operands is detected, by transposing the operand and detecting the leading one. The other operand is right-shifted by a number of bit positions equal to this difference. A sticky bit is generated if any logic "1's" are in the low-order n-x-2 bits fight shifted out of the second operand.
申请公布号 US5341319(A) 申请公布日期 1994.08.23
申请号 US19930016058 申请日期 1993.02.10
申请人 DIGITAL EQUIPMENT CORPORATION 发明人 MADDEN, WILLIAM C.;RAJAGOPALAN, VIDYA;SAMUDRALA, SRIDHAR
分类号 G06F7/487;G06F7/52;(IPC1-7):G06F7/38 主分类号 G06F7/487
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