| 摘要 |
PURPOSE:To increase the efficiency of coding by making unnecessary the insertion of special code showing the section between the unequal length code and the equal length code and simplifying the constitution of the coded converter. CONSTITUTION:The digital signal of N-bit is parallelly fed to the input terminal 1, it is converted into equal length code corresponding to the signal level with the first conversion means 2, and the second conversion means 3 converts the signal into unequal length code corresponding to the signal level of the input signal among 2N types of unequal length codes. The output of the both conversion means 2 and 3 is selected with the first selector 4 and fed to the buffer memory 5. Further, when the selector 4 selects the second conversion means 3, the discrimination circuit 6 discrimination whether the input signal is the level corresponding to the first unequal length code or not, the result of discrimination is fed to the control signal generator 7, the output of the generator 7 is fed to the selector 4 and the multiplexer 8 inputting the output of the memory 5, and the coded signal from the multiplexer 8 is outputted serially. |
