CELL ASSEMBLY MULTIPLEX PROCESSOR

摘要

PURPOSE:To provide a cell assembly multiplex processor for minimizing the amount of buffer memories to be used and arbitrarily setting a bit rate to be converted for each channel by providing a cell assembly control part and a cell transmission control part. CONSTITUTION:Multiplex data on a time division multiplex highway 5 are stored in a bank for each VC designated by a cell assembly control part 1 inside a buffer memory 10 with bank structure logically dividing the buffer memory 10. A cell transmission control part 2 constitutes the cell and outputs it by reading the multiplex data of the bank designated by inputting the address of a bank outputted by the control part 1 concerning the multiplex data stored in the buffer memory 10. The bank to be read together is defined as a non-used bank and used for storing the multiplex data inputted by the control part 1. Thus, the required memories can be minimized by assembling the fixed bit rate data of the highway 5 to the cell while dynamically using the memory 10.