Method of speeding up the data processing of a signal processor

摘要

The invention concerns a method of speeding up the data processing of a signal processor, to a signal processing unit (10) of which input data (EA; EB) with n-bit word length is fed. The signal processing unit (10) contains at least an arithmetic unit (14) and a multiplier (12). With such a signal processor, if input data words (EA, EB) with a shorter word length than the maximum n-bit word length of the signal processor are provided by a source for processing, invalid bits must be masked out during loading. This operation, and bit manipulations with other masks, can be speeded up if the content of the input data words can be changed by at least one masking unit (44, 54), which can be preset, depending on its setting, before processing by the signal processing unit (10). <IMAGE>