发明名称 Method and arrangement for inserting a 34 Mbit/s signal into D39 pulse frames
摘要 A plesiochronous digital signal (DS) is converted into a parallel digital signal (DSP) and is then inserted in one stage together with bytes of the D39 overhead, the path overhead, the pointer and stuffing bytes into two D39 pulse frames (D39X, D39Y). <IMAGE>
申请公布号 DE4309778(C1) 申请公布日期 1994.08.18
申请号 DE19934309778 申请日期 1993.03.25
申请人 SIEMENS AG, 80333 MUENCHEN, DE 发明人 LENZ, PETER, DR.-ING. DR., O-7126 MOELKAU, DE;LUDWIG, HORST, DR.-ING. DR., O-7022 LEIPZIG, DE;MUELLER, FRIEDRICH, DR.-ING. DR., O-7254 MACHERN, DE;ROHR, WILKIN, DIPL.-ING., O-7022 LEIPZIG, DE;WAGNER, RUDOLF, DIPL.-ING., O-7062 LEIPZIG, DE
分类号 H04J3/08;H04Q11/04;(IPC1-7):H04L5/22;H04J3/00;H04L12/50 主分类号 H04J3/08
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