| 摘要 |
<p>PURPOSE: To provide a data dividing circuit used for a device which decodes encoded image data having mutually different bit length. CONSTITUTION: A header detecting circuit detects a 1st header, a 2nd header, and a 3rd header from a bit stream of an image encoding device and outputs clocks based upon the detected headers. A bit stream output control circuit is synchronized with the clock and outputs specific bits of the bit stream in parallel, but a buffer controller 51 performs control so that the output of the bit stream output circuit is applied selectively to first-in first-out buffers 53 to 56 and a border detector 23 controls the number of the parallel output bits of the bit stream output control circuit along a slice border applied to a decoder, so that the amount of encoded image data that decoders 61 to 64 should process respectively comes less than the amount of data that one decoder should process.</p> |
