发明名称 DEVICE FOR GENERATING LAYOUT PATTERN
摘要 PURPOSE:To obtain a layout pattern generating device to generate a mask layout plot which can accurately realize operational characteristics preliminarily determined in a symbolic layout plot. CONSTITUTION:The layout pattern generating device to generate a mask layout plot 5 of IC chips is generated from the symbolic layout plot used for designing layouts of IC chips. This device is equipped with a means 12 to extract cell characteristics from previously generated mask layout figure 1 and a compacting means 4. By the compcting means 4, the symbolic layer plot is subjected to compaction treatment according to technology role 3 and the cell characteristics information extracted by the means 12 to generats the mask layout plot 5.
申请公布号 JPH06222549(A) 申请公布日期 1994.08.12
申请号 JP19930028422 申请日期 1993.01.26
申请人 MITSUBISHI ELECTRIC CORP 发明人 MURAKAMI MASAAKI
分类号 G03F1/68;G03F1/70;G06F17/50;H01L21/82 主分类号 G03F1/68
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