发明名称 |
NONVOLATILE SEMICONDUCTOR MEMORY |
摘要 |
<p>PURPOSE:To decrease the number of a pump-up by inputting drive controlling clocks of a boosting circuit for boosting word lines at the time of a read-out in the period of a precharging. CONSTITUTION:A signal phi PR (voltage rising circuit driving clock) for setting pump-up timings and a clock generation circuit CKU generating a precharge transistor controlling clock BPR for a precharging at the time of the read-out, a discharge transistor controlling clock DIS for controlling a discharging are connected to a boosting circuit VPU by which a boosted voltage VBB is generated. Timings of respective controlling clocks are so constituted in the circuit that the timing for the DIS is earlier than the changing point of a level of the BPR being the beginning of the read-out and the boosting circuit driving clock phiPR is more ealier than the timing for the DIS.</p> |
申请公布号 |
JPH06223589(A) |
申请公布日期 |
1994.08.12 |
申请号 |
JP19930013525 |
申请日期 |
1993.01.29 |
申请人 |
TOSHIBA CORP |
发明人 |
MIKI KAZUHIKO;MATSUMOTO OSAMU |
分类号 |
G11C11/407;G11C11/409;G11C16/06;G11C17/00;(IPC1-7):G11C16/06 |
主分类号 |
G11C11/407 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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