| 摘要 |
PURPOSE: To reduce software overheads of message transfer in a parallel system. CONSTITUTION: A processor addresses an input/output address requester on a data bus 104 before sending a message to an HBM channel and loads input/ output registers 111 to 115. In the case that an input/output address on a processor address bus 102 matches with the address range of a register 110, an address recognition block 106 loads data bent on the bus 104 to the registers 111 to 115 and the processor starts the transmission of an HBM message. In the case that the input/output address on the bus 102 matches with the register 111, a logic block 108 starts the processing of HBM. A hardware message header word includes a destination field and a source field, etc., and the message 125 to which a hardware preparation message header word is added as a prefix part is generated. |
