| 摘要 |
<p>PURPOSE: To erase a block without erasing all arrays, and to minimize interruption among blocks by dividing a memory device into first and second blocks, and providing a drain area, source area, floating gate, and control gate at each block. CONSTITUTION: The source area of the cell of a selected block 101 is connected through a source line 103 with a program potential Vpp in erasing. The source area of a block 102 which is not selected is connected through a common source lie 104 with a ground potential. The all control gates of the cell of the block 101 are connected with the ground potential in erasing, and the drain area is left floating. Therefore, a word line 107 of the block 101 or the like is turned into the ground potential, and a local bit line 108 or the like is separated from a global bit line 110 or the like by applying the ground potential to a selected line 105. The negative charge of the floating gate of the block 101 is eliminated through the source area, and the gate is erased, and left charged neutral.</p> |
