发明名称 VIRTUAL-GROUND READ-ONLY MEMORY CIRCUIT
摘要 <p>PURPOSE: To attain programming at a stage after a manufacture process without necessitating any large area by providing four cells symmetrically arranged for one bit line at a plurality of cells, and connecting the four cells with the bit line in a normal node. CONSTITUTION: One row constituted of memories 100 is connected with each of word lines 102-118. Those word lines are connected with a row selection drive 120 for selecting one word line. When one column line is selected, signal are obtained from bit lines at the both sides. Therefore, when a column line 150 is selected, signals are supplied from bit lines 130 and 132. Tr 130 and 132 are used for selecting the desired bit line. Therefore, one word lines is selected by the row selection driver 120, one column line is selected by a row selection driver 128, and bit lines are specified by Tr 160 and 162, so that one memory cell can be selected. One cell 200 having four memory cells are provided with Tr 202-208, and the drains are connected with the bit line in a normal node 211. Each Tr indicates one bit.</p>
申请公布号 JPH06215594(A) 申请公布日期 1994.08.05
申请号 JP19930298411 申请日期 1993.11.29
申请人 S G S THOMSON MICROELECTRON INC 发明人 ERUMAA EICHI GURITSUTSU;TSUIU SHII CHIYAN
分类号 G11C17/12;H01L27/112;(IPC1-7):G11C17/12 主分类号 G11C17/12
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