发明名称 MEMORY CELL CIRCUIT
摘要 PURPOSE:To attain stable write operation by constituting an FF with first and second inverters, connecting the output terminal of the first inverter to the input terminal of a third inverter and constituting a storage circuit. CONSTITUTION:The first to the third inverters 20-22 are constituted of P channel MOS Trs 4a-4c and N channel MOS Trs 5a-5c. The FF circuit is constituted of the inverters 20 and 21, and the storage circuit is constituted by connecting the output terminal of the inverter 21 to the input terminal of the inverter 22. The data write is performed by driving a bit line 9a to L and 9b to H or driving inversely according to the data by using drivers connected to the bit lines 9a, 9b. Then, access gates 5e, 5f become a conductive state by making the word line 8a the H. The input terminal of the inverter 21 becomes equal to the level of the line 9d, and that of the inverter 20 becomes equal to the level of the line 9a. Thus, the input terminal of the inverter 21 becomes the L, and the data are kept surely. It is similar in the case when the level of the line 9d is the L as well.
申请公布号 JPH06215580(A) 申请公布日期 1994.08.05
申请号 JP19930005832 申请日期 1993.01.18
申请人 MITSUBISHI ELECTRIC CORP 发明人 ARAI KOJI;MAENO HIDESHI
分类号 G11C11/412;H01L21/82;H01L27/10;H01L27/118 主分类号 G11C11/412
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