| 摘要 |
PURPOSE: To obtain a voltage to be supplied to the source area of a memory by using a potential prepared by a power source VPP at the circuit point of an (n) type FET connected between two (p) type FET, and a potential difference prepared by a power source VCC at the connecting point of a pair of (n) type FET. CONSTITUTION: An (n) type FET 75 is serially provided between (p) type Tr 72 and 74 whose characteristics are equal. The drain and gate of the Tr 75 are connected with the drain of the Tr 72, and a circuit point 73 is constituted. The gate of an (n) type FET 76 whose characteristic is equal to that of the Tr 75 is connected with the circuit point 73. Tr 76 and 77 whose characteristics are equal are serially connected between a VCC potential and a ground. A +2 volt VSI voltage is outputted from a signal line 80 to a circuit point between the Tr 76 and 77. The circuit point 73 is driven by a power source VPP, and adjusted to a high +12 volt. A relative potential difference between the VPP and VSI is maintained so that erasing along a word line which is not selected can be prevented. On the other hand, the VSI is not largely affected by the variation of the VCC. |
