| 摘要 |
<p>The multipipeline multiprocessor includes communication hardware and parallel communication algorithms that are free of contention but also optimal in the sense that communication time is minimized for any vector computation task. This apparatus makes use of a hypercube processor interconnection network that has the capability to transmit on all wires simultaneously. A set of optimal routing algorithms for any of a plurality of communication taks are either computed or stored in a memory to direct the interprocessor communication. Each computation task is defined as a plurality of sub-tasks, each sub-task defining a particular hypercube interconnection of the processors. The execution of the plurality of sub-tasks on the hypercube interconnection network implements the computation task. Selecting the plurality of sub-tasks in a manner that interconnects the processors in a non-blocking manner also reduces the communication time, since the activation of the hypercube interconnections are expeditiously accomplished, since no crosspoint switch settings must be computed.</p> |
