发明名称 RETRIGGERED OSCILLATOR FOR JITTER-FREE PHASE LOCKED LOOP FREQUENCY SYNTHESIS
摘要 A retriggered oscillator time base including a phase lock loop controlled ring (54) for direct retriggering by a reference oscillator (52). The ring (54) has taps (55) at various successive stages that are outputs to an on-the-fly selector (58) that can add any ten-bit value to a current-tap selection to enable a next-tap selection. Such on-the-fly addition can increase the period of a signal each cycle and thereby divide the reference frequency. Ring's outputs (55) are also used to drive two other retriggered rings (72, 74) for a plurality of NANO timing generators. The use of two rings allows retriggering of one of the rings before the other has completed a whole one-shot cycle. An on-the-fly selector (76) subtracts a value from a present NANO select to a next NANO select to convert back the timebase to the fixed reference frequency for phase and frequency comparison. The subtraction acts as a frequency multiplication whose output Tofx is equal to the reference frequency.
申请公布号 WO9417592(A1) 申请公布日期 1994.08.04
申请号 WO1994US00696 申请日期 1994.01.18
申请人 CREDENCE SYSTEMS CORPORATION 发明人 LESMEISTER, GARY, J.
分类号 H03K3/354;G01R31/317;G01R31/319;H03K3/03;H03K5/135;H03K5/15;H03L7/081;H03L7/087;H03L7/099;(IPC1-7):H03K5/26 主分类号 H03K3/354
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