FEEDBACK SHIFT REGISTER FOR GENERATING DIGITAL SIGNALS REPRESENTING SERIES OF PSEUDO-RANDOM NUMBERS

摘要

A feedback shift register for generating digital signals representing series of pseudo-random numbers has n-aries and exclusive OR-circuits in the feedback logic, as well as a clock generator. In order to generate digital signals with a feedback shift register suitable for subsequent digital processing, the clock generator (17) is connected to the n-aries (11, 12, 13, 14, 15) of the shift register (10) by a controllable gate circuit (18) which blocks one clock pulse per 2 clock pulses (CLK) of the clock generator (17).