| 摘要 |
A parallel computer architecture and a process for building and reconfiguring a consecrated parallel computer for solving problems are disclosed. The process consists of a plurality of interconnected and dissociatable processes. This special computer architecture allows the end user by means of a new process to repetitively determine himself individual discrete processes in a small digital circuit and then to configure the whole computer with these interconnected processes, as easily as by compilation. Since the problem is then directly solved in parallel in the hardware, without the intermediate steps of an instruction set, problems may be solved up to one million times more quickly than in the fastest workstations. The building process makes use of commercially available chips and allows the end user to define a massive parallel computer adapted to his problems. |
