| 摘要 |
PURPOSE:To enable to simply perform a test on an IC, especially on an I<2>L part, by a method wherein a pad which is connected to the injector current supply circuit on an I<2>L circuit is provided. CONSTITUTION:On an I<2>L circuit, an input signal SIN is applied to the input terminal of the first stage gate circuit G1 under the condition wherein an injector current is supplied to each of gate circuits G1-G7 from test pads 31 and 32 respecively. As a result, the signal S6 which has passed through the gate circuits G1-G6 is led out as a signal having lag time against the signal SIN. On this lagging circuit, the lagging time can be brought in the desired range by the injector circuit inputted from the pads 31 and 32, the evaluation factors with which operational margin will be judged is obtained, and the defective or non-defective judgement can be given on the I<2>L circuit. Through these procedures, the IC containing the I<2>L circuit can be evaluated, not only the defectiveness or non-defectiveness of the chip but also the operation margin, by the condition of a chip, thereby enabling to simplify the grasping of the state of characteristics. |
